- 17 May 2006 -

AWR & IHP RFIC design deal

Applied Wave Research, Inc. (AWR) and Innovations for High Performance Microelectronics (IHP), Frankfurt (Oder), Germany, announced the availability of IHP's high-performance specialty SiGe process for AWR's Analog Office 2006 design suite. The delivery of the first AWR-based IHP process design kit (PDK) is part of a long-term partnership between the two companies to deliver complete RFIC design solutions for high-frequency applications.

Analog Office design software, which is used to design next-generation analog and RFIC wireless and wirelined communications products, helps design engineers significantly shorten IC development cycles, accelerate tape-out to IHP's process, and speed wireless products to market. IHP multi- project wafer (MPW) & prototyping services provide research and innovation for the European technological community.

"Today's designers face a constant challenge to deliver high-performance products in an ever-shrinking time-to-market window," said James Spoto, AWR president and CEO. "This customer-driven collaboration between two important links in the design chain, a leading high-frequency EDA vendor and a European silicon provider, enables our customers to accelerate the design-to-tapeout process, eliminate design spins, and achieve first-time silicon success."

"The partnership with AWR provides high-frequency wireless designers access to specific IHP process technology through validated PDKs in the Analog Office 2006 design environment," said Wolfgang Mehr, director of IHP. "Now our joint customers in the wireless broadband communications market will have seamless access to an integrated design solution built on the AWR open design platform and the high- performance IHP process."

The IHP SG25H1 0.25 µm bipolar complementary metal oxide semiconductor (BiCMOS) process offers high-performance technology with NpN heterojunction bipolar transistors (HBTs) up to fT/fmax= 180/220 GHz. The technology is suited to applications in the higher GHz bands, making it especially useful for the designers of next- generation wireless, broadband, and radar products. The process includes integrated HBTs with cut-off frequencies of up to 220 GHz, RF lateral double diffuse metal oxide semiconductor (LDMOS) devices with breakdown voltages of up to 26 V, including complementary devices. The process also includes a complete set of passive devices, such as resistors, capacitors and inductors.

The Analog Office-based IHP PDK includes a complete set of schematic symbols, simulation models, and fully parameterized layout cells that are characterized to match the IHP process performance. The simulation models are validated with the Synopsys HSPICE simulator and the AWR harmonic balance simulator.

The AWR-based IHP PDK will be available directly from IHP and its design partners in Q2 2006. For information on PDK pricing, availability, and support, contact IHP directly at www.ihp-microelectronics.com or +49 335 5625 647.

Web: www.ihp-microelectronics.com

Web: www.appwave.com